Integrated Circuits and Timing Validation
During the last few years the complexity of integrated circuits (ICs) has increased dramatically. On the other hand, the increasingly competitive market forced IC designers to reduce the cost and length of the IC design process.
One of the methods for reducing the cost of the IC design process, as well as speed-up the design process, involves re-using IC blocks (such as host processors, mixed signal blocks, dedicated logic and memory blocks) as well as increasing the integration level between IC blocks and sub-blocks. Integrated circuits such as system-on-chip provide a high degreed of integration.
In many IC based systems and multi-IC based systems there is a need to coordinate between many blocks, as well as to control the transmission of signals over commonly shared buses. Typically, a controller controls the transmission of signals by applying a Media Access Control (MAC) protocol.
In addition to the increasing complexity of ICs, the clock rates of the ICs have dramatically increased. IC clock rates that exceed tens of megahertz and even gigahertz are very common.
Due to the increasing clock rates timing issues are becoming more crucial. For example, when a controller has to apply a MAC protocol it has to take into account the delays associated with a propagation of signals over the bus to each unit that shares the common bus.
These timing constraints may result in degradation in the IC performances. They may also complicate the validation process, and especially the timing validation process of the IC based system. Some of the problems that are associated with timing validation process are highlighted in the following article: “Breaking down complexity for reliable system-level timing validation”, by D. Ziegenbein, M. Jersak, K. Richter and R. Ernst of the Technical University of Braunschweig, Germany.
Due to various reasons, including timing issues, changes in the arrangement of blocks, an/or in the number of blocks as well as in the content of blocks may require an extensive design and validation process.
Video Processing
Pixel is the smallest addressable element of an electronic display. Each pixel has a color that is commonly represented by three color components. The most commonly used representations (also known as color spaces) are RGB (Red, Green Blue color components) and YCbCr (Y holds the luminance information while Cb and Cr hold color difference data).
Computer systems apply various video processing processes in order to display a required visual content on an electronic display. The required visual content (image) may include multiple pictures (including picture in picture), text, graphics and the like. The video processing processes may include alpha blending, color format conversion, gamma correction and the like.
In a typical scenario multiple units cooperate in order to provide the required visual content. These units are controlled by a controller that sends control signals to the various units.
In the typical scenario a unit may receive signals (including video data and control signals) from multiple units. Accordingly, the validation process of the unit has to take into account the interactions between these units and the associated timing issues.
U.S. Pat. No. 6,329,996 of Bowen et al describes the difficulties in coordinating multiple graphic pipelines (each capable of performing the whole processing process) and offers a method and apparatus for synchronizing between graphic pipelines.
The video processing processes that are required to provide the required visual content may vary over time and may also differ from product to another.
There is a need to simplify the design process, as well as reduce the cost of the design process of IC that perform video processing processes.